| CPC H10D 84/0128 (2025.01) [H10D 30/6735 (2025.01); H10D 84/0144 (2025.01); H10D 84/038 (2025.01)] | 20 Claims |

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1. A method, comprising:
forming a first semiconductor fin corresponding to a channel region of a first FinFET transistor;
depositing a first interfacial dielectric layer on the first semiconductor fin;
depositing a dipole-inducing layer on the first interfacial dielectric layer;
depositing a first high-K dielectric layer on the dipole-inducing layer after depositing the dipole-inducing layer such that the dipole inducing layer is positioned between the first interfacial dielectric layer and the first high-K dielectric layer; and
forming a dipole layer from the dipole-inducing layer and at least one of high-K dielectric layer and the interfacial dielectric layer on the first semiconductor fin by performing a thermal anneal process.
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