US 12,324,211 B2
Ring transistor structure
Aurelien Gauthier Brun, Hsin-Chu (TW); Chun Lin Tsai, Hsin-Chu (TW); Jiun-Lei Jerry Yu, Zhudong Township (TW); Po-Chih Chen, Hsinchu (TW); and Yun-Hsiang Wang, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Apr. 18, 2023, as Appl. No. 18/302,174.
Application 18/302,174 is a continuation of application No. 17/144,671, filed on Jan. 8, 2021, granted, now 11,664,431.
Prior Publication US 2023/0261066 A1, Aug. 17, 2023
Int. Cl. H10D 64/23 (2025.01); H10D 30/47 (2025.01); H10D 64/00 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01)
CPC H10D 64/257 (2025.01) [H10D 30/475 (2025.01); H10D 64/01 (2025.01); H10D 64/111 (2025.01); H10D 64/519 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A transistor device, comprising:
a plurality of source contacts disposed over a substrate, wherein the plurality of source contacts comprise one or more curved outermost sidewalls;
a plurality of gate structures disposed over the substrate, wherein the plurality of gate structures wrap around one or more of the plurality of source contacts in one or more closed loops;
a drain contact disposed over the substrate, wherein the drain contact continuously wraps around one or more of the plurality of gate structures as a continuous structure; and
wherein a first gate structure of the plurality of gate structures is separated from the drain contact by a first distance and is separated from a source contact of the plurality of source contacts by a second distance, the second distance being different than the first distance.