US 12,324,204 B2
Transistors including two-dimensional materials
Carl Hugo Naylor, Portland, OR (US); Kevin P. O'Brien, Portland, OR (US); Chelsey Jane Dorow, Portland, OR (US); Kirby Kurtis Maxey, Hillsboro, OR (US); Tanay Arun Gosavi, Hillsboro, OR (US); Ashish Verma Penumatcha, Beaverton, OR (US); Urusa Shahriar Alaan, Hillsboro, OR (US); and Uygar E. Avci, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by INTEL CORPORATION, Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/032,989.
Prior Publication US 2022/0102499 A1, Mar. 31, 2022
Int. Cl. H10D 62/17 (2025.01); H10D 62/13 (2025.01); H10D 62/80 (2025.01); H10D 84/83 (2025.01)
CPC H10D 62/235 (2025.01) [H10D 62/151 (2025.01); H10D 62/80 (2025.01); H10D 84/83 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A microelectronic structure, comprising:
a transistor, including:
a channel, wherein the channel includes a first two-dimensional material region, and the first two-dimensional material region is a single crystal two-dimensional material region, and
a region, wherein the region is either a source region or a drain region of the transistor, and the region includes a second two-dimensional material region.