CPC H10D 30/202 (2025.01) [H01L 21/761 (2013.01); H10D 12/031 (2025.01); H10D 30/01 (2025.01); H10D 30/87 (2025.01); H10D 62/114 (2025.01); H10D 62/117 (2025.01); H10D 62/149 (2025.01); H10D 62/221 (2025.01); H10D 62/822 (2025.01); H10D 62/83 (2025.01); H10D 62/8303 (2025.01); H10D 62/8325 (2025.01); H10D 62/834 (2025.01); H10D 30/62 (2025.01); H10D 62/121 (2025.01)] | 5 Claims |
1. A transistor comprising:
source and drain regions disposed on a substrate;
a fin disposed between the source and drain regions;
a the fin being at least partially covered by a conductive structure and a dielectric layer, the dielectric layer electrically insulating the conductive structure from the fin; wherein
the source and drain regions comprise diamond doped with a P-type dopant, and
the fin comprises diamond doped with a P-type dopant, wherein the P-type dopant concentration of the fin is less than the P-type dopant concentration of the source and drain regions.
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