US 12,324,166 B2
Resistive memory device
Chungman Kim, Suwon-si (KR); Bonwon Koo, Suwon-si (KR); Dongho Ahn, Hwaseong-si (KR); Kiyeon Yang, Seoul (KR); Zhe Wu, Seoul (KR); and Chang Seung Lee, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jan. 5, 2022, as Appl. No. 17/568,866.
Claims priority of application No. 10-2021-0078289 (KR), filed on Jun. 16, 2021.
Prior Publication US 2022/0406844 A1, Dec. 22, 2022
Int. Cl. H10B 63/00 (2023.01); H10B 63/10 (2023.01); H10N 70/00 (2023.01); H10N 70/20 (2023.01); G11C 13/00 (2006.01)
CPC H10B 63/24 (2023.02) [H10B 63/10 (2023.02); H10B 63/84 (2023.02); H10N 70/231 (2023.02); H10N 70/826 (2023.02); H10N 70/8825 (2023.02); G11C 13/0004 (2013.01); G11C 13/003 (2013.01); G11C 2213/72 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A resistive memory device, comprising:
a resistive memory pattern; and
a selection element pattern electrically connected to the resistive memory pattern, the selection element pattern including a chalcogenide switching material and at least one metallic material, the chalcogenide switching material including germanium, arsenic, and selenium, and the at least one metallic material including aluminum, strontium, or indium,
wherein the selection element pattern includes an inhomogeneous material layer in which content of the at least one metallic material in the selection element pattern is variable according to a position within the selection element pattern.