| CPC H04W 72/40 (2023.01) [H04W 72/0453 (2013.01); H04W 92/18 (2013.01)] | 13 Claims |

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1. A first node, comprising:
at least one processor; and
one or more memories coupled to the at least one processor and storing programming instructions for execution by the at least one processor to cause the first node to perform operations comprising:
performing measurement on a first frequency to obtain a measurement result; and
determining whether to transmit a sidelink synchronization signal block on the first frequency based on the measurement result and a first threshold, wherein the first frequency is different from a synchronisation carrier frequency.
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