| CPC H04N 25/773 (2023.01) [H04N 25/7795 (2023.01)] | 14 Claims |
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1. An image sensing device comprising:
a pixel configured to generate a pixel signal having a single photon avalanche diode (SPAD) pulse by detecting incident light;
a time-to-digital converter (TDC) configured to generate time-to-digital converter (TDC) data representing a time of flight (TOF) for the SPAD pulse; and
a TDC memory configured to store the TDC data in a unit memory that is determined from among a plurality of unit memories according to the number of occurrences of the SPAD pulse,
wherein the TDC memory further includes a memory control block configured to activate the determined unit memory from among the plurality of unit memories according to the number of occurrences of the SPAD pulse and deactivate remaining unit memories other than the determined unit memory according to the number of occurrences of the SPAD pulse,
wherein the memory control block includes:
a memory inverter configured to receive the pixel signal and to generate an inverted pixel signal having a waveform that is opposite to that of the pixel signal;
a counter configured to increase a currently stored counter value at a rising edge of the inverted pixel signal;
a decoder configured to, in response to the counter value, generate decoder output data that includes any one decoder bit having a logic high level and remaining decoder bits each having a logic low level; and
a plurality of comparators, each of which compares the inverted pixel signal with each of the decoder bits to generate a memory enable signal.
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