US 12,323,336 B2
Combined write enable mask and credit return field
Tony Brewer, Plano, TX (US); and David Patrick, McKinney, TX (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 3, 2022, as Appl. No. 17/735,636.
Application 17/735,636 is a continuation of application No. 17/007,701, filed on Aug. 31, 2020, granted, now 11,356,378.
Prior Publication US 2022/0263769 A1, Aug. 18, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 47/10 (2022.01); H04L 49/90 (2022.01); H04L 101/695 (2022.01)
CPC H04L 47/39 (2013.01) [H04L 49/9026 (2013.01); H04L 2101/695 (2022.05)] 20 Claims
OG exemplary drawing
 
16. A method comprising:
receiving, by a memory controller, across a network from a source, a first packet comprising a first field, a second field, and a third field, the third field comprising first data;
based on determining whether the first field has a first value or a second value, selecting between a first response and a second, the first response comprising interpreting the second field as a write-enable mask, identifying masked data by applying the write-enable mask to the third field, and writing the masked data to memory, the second response comprising interpreting the second field as a credit return value and modifying credit data based on the credit return value; and
performing the selected response.