US 12,323,249 B2
Block acknowledgment for a multicast transmission with multiple concurrent streams
Yoel Boger, Shoham (IL); Ido Shani, Shoham (IL); Koby Vainapel, Herzliya (IL); Leor Kehaty, Givataim (IL); Marcelo Senter, Shoham (IL); and Guoqing Li, Campbell, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Mar. 25, 2024, as Appl. No. 18/616,003.
Application 18/616,003 is a continuation of application No. 17/232,055, filed on Apr. 15, 2021, granted, now 11,943,054.
Claims priority of provisional application 63/012,025, filed on Apr. 17, 2020.
Prior Publication US 2024/0235739 A1, Jul. 11, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H04W 84/12 (2009.01); H04L 1/1607 (2023.01); H04L 12/18 (2006.01); H04L 47/2483 (2022.01)
CPC H04L 1/1621 (2013.01) [H04L 12/1886 (2013.01); H04L 47/2483 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A baseband processor comprising:
processing circuitry configured to:
prepare, for transmission, a block acknowledgment request associated with a multicast transmission, the multicast transmission comprising a first stream and second stream, wherein the block acknowledgement request comprises a first starting sequence number and a first maximum sequence number that indicate a first set of frames corresponding to the first stream and the block acknowledgment request comprises a second starting sequence number and a second maximum sequence number that indicate a second set of frames corresponding to the second stream;
after transmission of the block acknowledgement request, prepare, for transmission, the multicast transmission comprising the first and second streams; and
receive a block acknowledgement response for the multicast transmission from an electronic device, wherein the block acknowledgment response indicates whether one or more of the first set of frames and one or more of the second set of frames were received by the electronic device; and
interface circuitry coupled with the processing circuitry, the interface circuitry to communicatively couple the processing circuitry to a component of a device.