| CPC H04L 1/0056 (2013.01) [H04L 1/0041 (2013.01); H04N 19/89 (2014.11)] | 18 Claims |
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1. An apparatus comprising:
a memory; and
at least one processor coupled with the memory, the at least one processor configured to cause the apparatus to:
receive a bitstream comprising video coded data;
perform forward error correction (“FEC”) decoding on the video coded data to correct at least one bitwise transmission error of the video coded data;
perform video decoding and semantic error correction on the FEC-decoded video coded data according to a fixed knowledge base of a video codec specification to correct and conceal at least one video artifact in the FEC-decoded video coded data due to a bit-inexact reception of the video coded data; and
reconstruct, based on the semantic error correction, a video uncoded representation of concealed approximate semantic content relative to the video coded data,
wherein the video decoding or the semantic error correction is performed based on the video codec specification, a statistical joint spatio-temporal video frame information, or a usage of the joint spatio-temporal video frame information as a first statistical prior semantic model with a second statistical model for the semantic error correction, and
wherein the video decoding or the semantic error correction is performed based on a joint optimization of the video decoding and the semantic error correction as a unique statistical neural model with the fixed knowledge base of the video codec specification.
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