| CPC H04B 1/0475 (2013.01) [H04B 1/525 (2013.01)] | 18 Claims |

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1. A transceiver circuit comprising:
a delay equalizer circuit configured to:
receive a time-variant input vector modulated for transmission in a plurality of transmission frequencies, the time-variant input vector is associated with a time-variant amplitude and a variable group delay that varies in accordance with the time-variant amplitude in each of the plurality of transmission frequencies;
equalize the time-variant input vector to thereby convert the variable group delay in each of the plurality of transmission frequencies into a respective constant group delay across the time-variant amplitude such that a respective variable phase error associated with the variable group delay in each of the plurality of transmission frequencies can become linearly related; and
generate a delay-equalized vector associated with the time-variant amplitude and having the respective constant group delay in a respective one of the plurality of transmission frequencies; and
a phase correction circuit configured to:
determine a reference phase offset corresponding to a reference frequency selected among the plurality of transmission frequencies;
superimpose the reference phase offset on the respective variable phase error of the respective one of the plurality of transmission frequencies to thereby determine a phase correction term configured to correct the respective variable phase error in the respective one of the plurality of transmission frequencies; and
apply the determined phase correction term to the delay-equalized vector to generate a delay-phase-equalized vector.
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