US 12,323,072 B2
Rectifier stability enhancement using closed loop control
John Walley, Ladera Ranch, CA (US); Jim Le, Fort Collins, CO (US); and Marc Keppler, Windsor, CO (US)
Assigned to AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED, Palo Alto, CA (US)
Filed by Avago Technologies International Sales Pte. Limited, Singapore (SG)
Filed on Jul. 29, 2022, as Appl. No. 17/877,462.
Prior Publication US 2024/0039423 A1, Feb. 1, 2024
Int. Cl. H02M 7/217 (2006.01); H02J 50/10 (2016.01); H02J 50/70 (2016.01); H04L 27/02 (2006.01)
CPC H02M 7/217 (2013.01) [H02J 50/10 (2016.02); H02J 50/70 (2016.02); H04L 27/02 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A system comprising:
a rectifier comprising:
a plurality of field effect transistors (FETs); and
a plurality of comparators, each configured to switch one or more of the FETs;
a high pass filter configured to extract noise components of a VRECT signal; and
at least one controller configured to:
receive an oscillating signal (FCLK);
identify an event as being an occurrence of one of a predefined set of events;
determining a fidelity of FCLK associated with the event;
determine a gain value for the rectifier based on a slope of FCLK;
measure changes in FCLK over time;
identify noise in FCLK; and
adjust a current threshold (ILIM) of at least one of the plurality of comparators based the identified noise and on the measured changes.