US 12,322,956 B2
Protection circuit and semiconductor device
Kentaro Watanabe, Yokohama Kanagawa (JP)
Assigned to Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed by Kabushiki Kaisha Toshiba, Tokyo (JP); and Toshiba Electronic Devices & Storage Corporation, Tokyo (JP)
Filed on Feb. 17, 2023, as Appl. No. 18/111,472.
Claims priority of application No. 2022-151651 (JP), filed on Sep. 22, 2022.
Prior Publication US 2024/0106231 A1, Mar. 28, 2024
Int. Cl. H02H 9/04 (2006.01)
CPC H02H 9/046 (2013.01) 13 Claims
OG exemplary drawing
 
1. A protection circuit comprising:
a first power supply line;
a second power supply line;
a third power supply line;
a first resistor coupled between the first power supply line and a first node;
a first capacitor coupled between the first node and the third power supply line;
a first transistor coupled between the second power supply line and the third power supply line;
a first inverter including a first power supply end coupled to the second power supply line, a second power supply end coupled to the third power supply line, and an input end coupled to the first node;
a second inverter including a first power supply end coupled to the second power supply line, a second power supply end coupled to the third power supply line, and an input end coupled to an output end of the first inverter; and
a third inverter including a first power supply end coupled to the second power supply line, a second power supply end coupled to the third power supply line, an input end coupled to an output end of the second inverter, and an output end coupled to a gate of the first transistor.