| CPC H01L 23/5383 (2013.01) [H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/66 (2013.01); H01L 24/16 (2013.01); H01L 24/48 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/48227 (2013.01)] | 18 Claims |

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1. A semiconductor package comprising:
a redistribution substrate including a first surface and a second surface that are opposite to each other;
an antenna substrate on the first surface of the redistribution substrate, the antenna substrate including a first insulating portion and antenna patterns on a top surface of the first insulating portion; and
a first semiconductor chip on the second surface of the redistribution substrate,
wherein the redistribution substrate includes a second insulating portion and a redistribution pattern in the second insulating portion,
wherein the redistribution pattern includes an interconnection portion extending parallel to a top surface of the second insulating portion and a via portion protruding from the interconnection portion toward the first surface of the redistribution substrate,
wherein a width of the via portion decreases as a height in a direction from the second surface toward the first surface of the redistribution substrate increases,
wherein the first semiconductor chip includes an active surface and an inactive surface that are opposite to each other,
wherein the active surface of the first semiconductor chip is adjacent to the second surface of the redistribution substrate, and
wherein the antenna substrate further comprises
via structures penetrating the first insulating portion and electrically connecting to the antenna patterns, respectively, and
a shielding layer being a horizontal structure and between an adjacent pair of the via structures, the shielding layer being apart from the via structures, and
the antenna patterns electrically connect to the first semiconductor chip through the via structures and the redistribution pattern.
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