US 12,322,473 B2
Determining read voltage offset in memory devices
Robert W. Mason, Boise, ID (US); Pitamber Shukla, Boise, ID (US); and Steven Michael Kientz, Westminster, CO (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jun. 26, 2024, as Appl. No. 18/755,033.
Application 18/755,033 is a continuation of application No. 17/897,438, filed on Aug. 29, 2022, granted, now 12,057,190.
Prior Publication US 2024/0347084 A1, Oct. 17, 2024
Int. Cl. G11C 16/10 (2006.01); G11C 7/10 (2006.01); G11C 7/22 (2006.01)
CPC G11C 7/1096 (2013.01) [G11C 7/1069 (2013.01); G11C 7/109 (2013.01); G11C 7/222 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device operatively coupled to the memory device, to perform operations comprising:
initializing the memory device;
selecting at least one sample management unit on the memory device;
performing a calibration operation on the sample management unit to determine a duration value reflecting a duration during which the memory device was powered down;
adjusting an accumulator value based on the duration value;
determining a read voltage value based on the accumulator value; and
performing a read operation using the read voltage value.