| CPC G09G 3/32 (2013.01) [G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2320/0247 (2013.01)] | 20 Claims |

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1. A display device comprising:
a display panel including a pixel;
a gate driver which applies an anode initialization signal to the pixel; and
a driving controller which receives a horizontal synchronization signal, receives input image data at a variable frame frequency, and controls the gate driver,
wherein a frame period for the display panel includes a scan period or one or more hold periods,
wherein the driving controller generates a count value by counting a number of pulses of the horizontal synchronization signal, and determines a current frame period as a hold period when the count value exceeds a reference value, and
wherein a time length of the anode initialization signal in each of the one or more hold periods is longer than a time length of the anode initialization signal in the scan period.
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