US 12,322,311 B2
Display apparatus and method of driving the same
Geunjeong Park, Hwaseong-si (KR); Donggyu Lee, Yongin-si (KR); Jae-Hyeon Jeon, Seoul (KR); and Jeong-Young Kim, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Feb. 9, 2022, as Appl. No. 17/668,323.
Claims priority of application No. 10-2021-0019508 (KR), filed on Feb. 10, 2021.
Prior Publication US 2022/0392382 A1, Dec. 8, 2022
Int. Cl. G09G 3/20 (2006.01)
CPC G09G 3/20 (2013.01) [G09G 3/2096 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/021 (2013.01); G09G 2330/028 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A display apparatus comprising:
a display panel having a pixel including a first transistor and a light emitting element;
a driving controller configured to determine a driving frequency;
a gate driver configured to output a gate signal and a bias control signal to the pixel;
an emission driver configured to output an emission signal to the pixel; and
a data driver configured to output a data voltage to the pixel,
wherein the bias control signal to apply a bias voltage to the first transistor has a first width in a writing frame and a second width different from the first width in a holding frame,
wherein the pixel comprises:
the first transistor including a control electrode connected to a first node, an input electrode connected to a second node and an output electrode connected to a third node;
a second transistor including a control electrode, an input electrode configured to receive the data voltage and an output electrode connected to a fourth node;
a third transistor including a control electrode, an input electrode connected to the first node and an output electrode connected to the third node;
a fourth transistor including a control electrode, an input electrode configured to receive an initialization voltage and an output electrode connected to the first node;
a fifth transistor including a control electrode, an input electrode configured to receive a reference voltage and an output electrode connected to the fourth node;
a sixth transistor including a control electrode, an input electrode connected to the third node and an output electrode connected to an anode electrode of the light emitting element;
a seventh transistor including a control electrode, an input electrode configured to receive the initialization voltage and an output electrode connected to the anode electrode of the light emitting element;
an eighth transistor including a control electrode, an input electrode configured to receive the bias voltage and an output electrode connected to the second node;
a ninth transistor including a control electrode, an input electrode configured to receive a first power voltage and an output electrode connected to the second node;
the light emitting element including the anode electrode connected to the output electrode of the seventh transistor and a cathode electrode configured to receive a second power voltage;
a first capacitor including a first electrode configured to receive the first power voltage and a second electrode connected to the fourth node; and
a second capacitor including a first electrode connected to the fourth node and a second electrode connected to the first node.