| CPC G06N 10/00 (2019.01) [G06N 10/40 (2022.01); H01R 12/78 (2013.01); H01R 12/79 (2013.01); H05K 1/0277 (2013.01); H05K 1/189 (2013.01); H05K 7/2039 (2013.01)] | 20 Claims |

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1. A quantum computing system, comprising:
one or more classical processors;
quantum hardware comprising one or more qubits;
a chamber mount configured to support the quantum hardware;
a vacuum chamber configured to receive the chamber mount and dispose the quantum hardware in a vacuum, the vacuum chamber forming a cooling gradient from an end of the vacuum chamber to the quantum hardware; and
a plurality of flex circuit boards comprising one or more signal lines, each of the plurality of flex circuit boards configured to transmit signals by the one or more signal lines through the vacuum chamber to couple the one or more classical processors to the quantum hardware;
wherein the end of the vacuum chamber comprises a hermetic seal base comprising a plurality of fitted seals and a plurality of seal slots configured to receive the plurality of fitted seals, each of the plurality of flex circuit boards passing through a respective fitted seal of the hermetic seal base, and each of the plurality of fitted seals being inserted into a respective seal slot of the hermetic seal base.
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