US 12,321,676 B2
System and methods for modeling and simulating on-die capacitors
Peng Sun, Hubei (CN); and Yuzhong Wang, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Jan. 24, 2022, as Appl. No. 17/648,782.
Application 17/648,782 is a continuation of application No. PCT/CN2021/136269, filed on Dec. 8, 2021.
Prior Publication US 2023/0177246 A1, Jun. 8, 2023
Int. Cl. G06F 30/367 (2020.01); G01R 31/28 (2006.01)
CPC G06F 30/367 (2020.01) [G01R 31/2851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for analyzing integrated circuits, comprising:
performing a first resistor capacitor (RC) extraction process on a power-receiving circuit in a pad region of a memory device to produce and producing a first RC model, wherein the first RC extraction process is performed at a first frequency and a second frequency, the second frequency higher than the first frequency;
scanning a netlist of a power distribution network of the memory device, wherein the power distribution network is electrically connected to the power-receiving circuit;
determining a selection of circuit elements of the power distribution network based on a predetermined criteria;
performing a second RC extraction process on the selection of circuit elements to produce a second RC model; and
performing a simulation process on the power-receiving circuit and the power distribution network, wherein power is supplied from the first RC model to the second RC model.