US 12,321,610 B2
Balanced codewords for reducing a selected state in memory cells
Christophe Vincent Antoine Laurent, Agrate Brianza (IT); and Riccardo Muzzetto, Arcore (IT)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 12, 2022, as Appl. No. 17/887,239.
Prior Publication US 2024/0053902 A1, Feb. 15, 2024
Int. Cl. G06F 3/06 (2006.01); G06F 11/10 (2006.01)
CPC G06F 3/0619 (2013.01) [G06F 3/0629 (2013.01); G06F 3/0673 (2013.01); G06F 11/1012 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method, comprising:
dividing a sequence of bits into a first set of bits and a second set of bits;
inverting a first portion of a first codeword that comprises the first set of bits to reach a first target ratio of logic values in the first codeword;
determining, after inverting the first portion and based at least in part on a coding scheme, a set of states associated with the second set of bits and the first set of bits including the inverted first portion;
changing a subset of the set of states to reach a second target ratio of states in the set of states;
determining, based at least in part on the coding scheme, a second portion of the second set of bits associated with the changed subset of the set of states; and
writing, to a set of memory cells according to the coding scheme, the first codeword and a second codeword comprising the second set of bits including the second portion.