US 12,321,281 B2
Computer system including a main memory device with heterogeneous memories and method of operating the same
Yun Jeong Mun, Gyeonggi-do (KR); Rak Kie Kim, Gyeonggi-do (KR); and Ho Kyoon Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on May 4, 2023, as Appl. No. 18/311,896.
Claims priority of application No. 10-2022-0150725 (KR), filed on Nov. 11, 2022.
Prior Publication US 2024/0160574 A1, May 16, 2024
Int. Cl. G06F 12/0891 (2016.01)
CPC G06F 12/0891 (2013.01) 9 Claims
OG exemplary drawing
 
1. A computer system comprising:
a processor;
a first memory device;
a second memory device having access latency different from access latency of the first memory device;
a cache memory including a plurality of cache entries, configured to store caching data provided from the first memory device or the second memory device in the cache entries; and
a cache controller configured to manage a flag indicating whether the caching data is provided from the first memory device or the second memory device, and determine a cache entry to be evicted from the cache entries based on a cache miss ratio of request data and a cache occupancy ratio, and
wherein the cache miss ratio comprises a first cache miss ratio, which is a ratio of a first number of misses in which the request data is read from the first memory device to a total number of cache misses, and a second cache miss ratio, which is a ratio of a second number of misses in which the request data is read from the second memory device to the total number of cache misses,
the cache occupancy ratio comprises a first cache occupancy ratio, which is a ratio of a number of a first caching data provided from the first memory device to a total number of the cache entries, and a second cache occupancy ratio, which is a ratio of a number of a second caching data provided from the second memory device to a total number of the cache entries, and
the cache controller is configured to determine the cache entry to be evicted based on the first cache miss ratio and the first cache occupancy ratio to the first memory device or the second cache miss ratio and the second cache occupancy ratio to the second memory device.