| CPC H03K 3/017 (2013.01) [H03K 5/05 (2013.01); H03K 5/135 (2013.01); H03K 5/1565 (2013.01)] | 20 Claims |
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1. A duty cycle correction circuit comprising:
a duty correction circuit configured to correct a duty rate of an input clock signal based on a duty control code and configured to generate an output clock signal;
an information generation circuit configured to compare a difference between operation power voltages based on an operation mode and configured to generate voltage information; and
a duty control circuit configured to receive the voltage information from the information generation circuit and configured to generate the duty control code that includes the voltage information based on a duty rate of the output clock signal.
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