CPC H01L 27/0207 (2013.01) [H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 21/823871 (2013.01); H01L 23/481 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H01L 29/0665 (2013.01); H01L 29/0847 (2013.01); H01L 29/42392 (2013.01); H01L 29/7851 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A semiconductor device, comprising:
a substrate that includes a cell region and a dummy region;
a first metal layer on the substrate, the first metal layer including a dummy line on the dummy region;
a power delivery network on a bottom surface of the substrate; and
a first through via that penetrates the substrate and extends from the power delivery network toward the dummy line,
wherein the first through via is electrically connected to the dummy line,
wherein the power delivery network includes:
a plurality of lower lines; and
a pad line below the lower lines, and
wherein the pad line is electrically connected through the lower lines to the first through via.
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