US 11,996,339 B2
Electronic element mounting substrate, and electronic device
Kenichi Ura, Kyoto (JP); and Madoka Kato, Kyoto (JP)
Assigned to KYOCERA Corporation, Kyoto (JP)
Appl. No. 17/297,058
Filed by KYOCERA Corporation, Kyoto (JP)
PCT Filed Nov. 27, 2019, PCT No. PCT/JP2019/046377
§ 371(c)(1), (2) Date May 26, 2021,
PCT Pub. No. WO2020/111125, PCT Pub. Date Jun. 4, 2020.
Claims priority of application No. 2018-222619 (JP), filed on Nov. 28, 2018.
Prior Publication US 2021/0407872 A1, Dec. 30, 2021
Int. Cl. H01L 23/13 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/20 (2006.01)
CPC H01L 23/13 (2013.01) [H01L 23/49822 (2013.01); H01L 23/20 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/49176 (2013.01); H01L 2924/15151 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/17151 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic element mounting substrate comprising:
a substrate comprising, on a first upper surface, a mounting region in which an electronic element is to be mounted;
a frame body located on the first upper surface of the substrate and surrounding the mounting region;
a channel extending through the frame body outward from an inner wall of the frame body; and
an electrode pad located on the first upper surface of the substrate or an inner surface of the frame body, wherein
the channel is located above or below the electrode pad, and
the frame body comprises a first frame body located on the first upper surface of the substrate and surrounding the mounting region, and a second frame body located on and is in direct contact with a second upper surface of the first frame body and surrounding the mounting region.