US 11,995,357 B2
Disaggregation computing system and method
Dae Ub Kim, Daejeon (KR); Jong Tae Song, Daejeon (KR); and Joon Ki Lee, Daejeon (KR)
Assigned to Electronics and Telecommunications Research Institute, Daejeon (KR)
Filed by ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE, Daejeon (KR)
Filed on Sep. 8, 2022, as Appl. No. 17/940,502.
Claims priority of application No. 10-2022-0006805 (KR), filed on Jan. 17, 2022.
Prior Publication US 2023/0229360 A1, Jul. 20, 2023
Int. Cl. G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 13/16 (2006.01)
CPC G06F 3/067 (2013.01) [G06F 3/0607 (2013.01); G06F 3/0653 (2013.01); G06F 12/0292 (2013.01); G06F 13/1668 (2013.01); G06F 2212/1016 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A disaggregation computing system, comprising:
a local computing device that comprises a local processor, a local memory bus, a local memory and a local disaggregation controller;
a remote computing device that comprises a remote processor, a remote memory bus, a remote memory and a remote disaggregation controller; and
a disaggregation network that connects the local computing device and the remote computing device,
wherein at least one of the local disaggregation controller and the remote disaggregation controller is configured to:
check a response delay for access of the remote memory, and
control the access of the remote memory based on the response delay.