CPC G06F 17/153 (2013.01) [G06F 9/3455 (2013.01); G06F 12/08 (2013.01); G06N 3/084 (2013.01)] | 20 Claims |
1. An electronic apparatus comprising:
a memory; and
a processor connected to the memory configured to control the electronic apparatus,
wherein the processor is configured to:
obtain calculation information based on input data of a deconvolution calculation being input,
obtain a size of output data based on the obtained calculation information,
obtain a plurality of memory address values corresponding to a size of the output data using an address generation module,
perform convolution calculation based on the calculation information using a convolution calculation module to obtain an intermediate value in the convolution calculation process,
obtain a memory address value corresponding to the obtained intermediate value of the plurality of obtained memory addresses using the address generation module,
store the obtained intermediate value in the memory address value corresponding to the intermediate value,
accumulate at least one intermediate value based on the memory address value corresponding to the intermediate value using a cumulative calculation module, and
obtain a deconvolution calculation value with respect to the input data based on the accumulated at least one intermediate value.
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