US 11,995,023 B2
Techniques to transfer data among hardware devices
Kiran Kumar Modukuri, Santa Clara, CA (US); Christopher J. Newburn, South Beloit, IL (US); Saptarshi Sen, San Jose, CA (US); Akilesh Kailash, San Jose, CA (US); and Sandeep Joshi, Campbell, CA (US)
Assigned to NVIDIA Technologies, Inc., Santa Clara, CA (US)
Filed by NVIDIA Corporation, Santa Clara, CA (US)
Filed on Sep. 23, 2021, as Appl. No. 17/483,560.
Application 17/483,560 is a continuation of application No. 16/816,122, filed on Mar. 11, 2020, granted, now 11,132,326.
Prior Publication US 2022/0012207 A1, Jan. 13, 2022
Int. Cl. G06F 13/42 (2006.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01); G06F 15/173 (2006.01)
CPC G06F 13/4282 (2013.01) [G06F 13/28 (2013.01); G06F 13/4022 (2013.01); G06F 15/173 (2013.01); G06F 15/17362 (2013.01); G06F 2213/0026 (2013.01)] 26 Claims
OG exemplary drawing
 
1. A processor, comprising:
one or more circuits to perform an application programming interface (API) to select one or more interconnects to be used to transfer information among two or more computing resources based, at least in part, on one or more performance metrics corresponding to the one or more interconnects.