US 11,994,762 B2
Liquid crystal handwriting board, handwriting device, and method for controlling handwriting device
Yang Ge, Beijing (CN); Yu Zhao, Beijing (CN); Xiaojuan Wu, Beijing (CN); Jiaxing Wang, Beijing (CN); Xian Wang, Beijing (CN); Huairui Yue, Beijing (CN); Jianwei Ma, Beijing (CN); Hailong Wang, Beijing (CN); Dawei Feng, Beijing (CN); and Hao Yan, Beijing (CN)
Assigned to Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 17/802,744
Filed by Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Oct. 14, 2021, PCT No. PCT/CN2021/123853
§ 371(c)(1), (2) Date Aug. 26, 2022,
PCT Pub. No. WO2022/105490, PCT Pub. Date May 27, 2022.
Claims priority of application No. 202011293671.3 (CN), filed on Nov. 18, 2020.
Prior Publication US 2023/0134866 A1, May 4, 2023
Int. Cl. G02F 1/1333 (2006.01); G02F 1/133 (2006.01); G02F 1/1339 (2006.01); G02F 1/1343 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01)
CPC G02F 1/13338 (2013.01) [G02F 1/13306 (2013.01); G02F 1/133357 (2021.01); G02F 1/1339 (2013.01); G02F 1/134309 (2013.01); G02F 1/136286 (2013.01); G02F 1/1368 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A liquid crystal handwriting board, comprising: a liquid crystal panel, and a drive assembly electrically connected to the liquid crystal panel;
wherein
the liquid crystal panel comprises: a first substrate and a second substrate that are opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate, wherein the first substrate comprises a plurality of bulk pixel electrodes, and the second substrate comprises a planar common electrode; and
the drive assembly is configured to apply, based on position information of a region to be erased, a pixel voltage to a pixel electrode in the region to be erased in the case that the liquid crystal handwriting board is in an erasing mode, such that a voltage difference is developed between the pixel electrode in the region to be erased and the common electrode, wherein the first substrate further comprises a second planarization layer disposed on the pixel electrode;
wherein the first substrate further comprises: a plurality of thin-film transistors electrically connected to the drive assembly, wherein the pixel electrode is electrically connected to at least one of the plurality of thin-film transistors;
wherein the first substrate further comprises a first planarization layer disposed on the at least one thin-film transistor.