| CPC H10K 59/353 (2023.02) [H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 59/131 (2023.02); H10K 59/65 (2023.02)] | 17 Claims |

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1. A display panel, comprising:
a first display region;
a second display region, at least located on a side of the first display region;
a plurality of sub-pixels, located in the first display region and the second display region, a density of the sub-pixels in the first display region being less than a density of the sub-pixels in the second display region, and each of the plurality of the sub-pixels comprising a pixel circuit;
a plurality of pixel groups, located in the first display region, at least one of the plurality of pixel groups comprising at least two sub-pixels; and
a first power line, configured to provide a first voltage signal to the pixel circuit,
wherein the first power line comprises a plurality of first wires and a plurality of second wires, the plurality of first wires extend to the first display region from the second display region and are electrically connected with the plurality of pixel groups, the plurality of second wires are located in the first display region and located between the adjacent first wires, the plurality of second wires extend along a first direction, the adjacent second wires are spaced from each other along the first direction, and the plurality of second wires are electrically connected with the plurality of pixel groups,
wherein at least one of the plurality of first wires comprises a first sub-wire extending along the first direction and a second sub-wire extending along a second direction, the first direction intersects with the second direction, and the second sub-wire is electrically connected with at least one of the plurality of second wires,
wherein the at least two sub-pixels comprise a first sub-pixel and a second sub-pixel, the first sub-pixel and the second sub-pixel are arranged along the first direction, at least one of the plurality of second wires is electrically connected with the first sub-pixel and the second sub-pixel, and the second sub-wire and the plurality of second wires are located in different layers,
each of the plurality of the sub-pixels further comprises a light-emitting element, the pixel circuit comprises a first transistor, a second transistor, and a storage capacitor, the first transistor is respectively connected with the second transistor and the storage capacitor, the second transistor is connected with the light-emitting element, the first transistor comprises a first active part and a second active part, and the first active part and the second active part are connected by a conductive part,
each of the plurality of the second wires further comprises a connecting arm, the connecting arm and the conductive part of one sub-pixel overlapping with the second wire in the pixel group are spaced from each other in a third direction and partially overlap in the third direction, and the third direction is perpendicular to the first direction and perpendicular to the second direction.
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