US 12,317,513 B2
Semiconductor device and method for forming the same
Shy-Jay Lin, Jhudong Township (TW); Chien-Min Lee, Hsinchu (TW); Hiroki Noguchi, Hsinchu (TW); MingYuan Song, Hsinchu (TW); Yen-Lin Huang, Hsinchu (TW); and William Joseph Gallagher, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on May 30, 2024, as Appl. No. 18/679,002.
Application 18/679,002 is a division of application No. 18/335,816, filed on Jun. 15, 2023, granted, now 12,022,665.
Application 18/335,816 is a division of application No. 17/216,162, filed on Mar. 29, 2021, granted, now 11,723,218, issued on Aug. 8, 2023.
Claims priority of provisional application 63/045,285, filed on Jun. 29, 2020.
Prior Publication US 2024/0315051 A1, Sep. 19, 2024
Int. Cl. H10B 61/00 (2023.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10B 61/22 (2023.02) [H01L 21/76898 (2013.01); H01L 23/528 (2013.01); H10D 84/0149 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a protrusion over a first side of a substrate;
forming a buried contact adjacent to the protrusion, wherein the buried contact has a portion extending into the substrate;
forming a gate wrapping over the protrusion;
forming an epitaxial feature in a region of the protrusion, wherein the gate or the epitaxial feature is electrically connected to the buried contact;
forming first conductive lines over the gate and the epitaxial features;
forming a conductive via penetrating through the substrate and connecting to the buried contact; and
forming second conductive lines over another side of the substrate, wherein the second conductive lines are electrically connected to the conductive via.