US 12,317,499 B2
Semiconductor memory device
Tatsuki Koshida, Yokkaichi (JP); Takayuki Ishikawa, Yokkaichi (JP); Kenzo Manabe, Yokkaichi (JP); and Daisuke Kuwabara, Yokkaichi (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Aug. 11, 2022, as Appl. No. 17/885,739.
Claims priority of application No. 2022-042299 (JP), filed on Mar. 17, 2022.
Prior Publication US 2023/0301108 A1, Sep. 21, 2023
Int. Cl. H10B 43/30 (2023.01); H10B 43/40 (2023.01); H10D 64/01 (2025.01)
CPC H10B 43/40 (2023.02) [H10B 43/30 (2023.02); H10D 64/037 (2025.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a semiconductor layer extending in a first direction;
a conductive layer opposed to the semiconductor layer in a second direction intersecting with the first direction;
an electric charge accumulating layer disposed between the semiconductor layer and the conductive layer;
a first insulating layer disposed between the semiconductor layer and the electric charge accumulating layer; and
a second insulating layer disposed between the conductive layer and the electric charge accumulating layer, wherein
the semiconductor layer includes at least one protrusion protruding in the second direction toward the electric charge accumulating layer,
a position in the first direction of the protrusion is inside with respect to corner portions at both ends in the first direction of a surface opposed to the semiconductor layer in the electric charge accumulating layer, and
a distance between a corner portion of the electric charge accumulating layer and the protrusion of the semiconductor layer is 4/3 or more of a shortest distance between the protrusion of the semiconductor layer and the electric charge accumulating laver.
 
4. A semiconductor memory device comprising:
a semiconductor layer extending in a first direction;
a first conductive layer opposed to the semiconductor layer in a second direction intersecting with the first direction;
a second conductive layer disposed spaced in the first direction from the first conductive layer, and opposed to the semiconductor layer in the second direction;
a first electric charge accumulating layer disposed between the semiconductor layer and the first conductive layer;
a second electric charge accumulating layer disposed between the semiconductor layer and the second conductive layer;
a first insulating layer disposed between the semiconductor layer and the first electric charge accumulating layer and between the semiconductor layer and the second electric charge accumulating layer; and
a second insulating layer disposed between the first conductive layer and the first electric charge accumulating layer and between the second conductive layer and the second electric charge accumulating layer, wherein
the semiconductor layer includes at least one protrusion protruding in the second direction toward the first electric charge accumulating layer on a surface opposed to the first electric charge accumulating layer,
a position in the first direction of the protrusion is inside with respect to corner portions at both ends in the first direction of a surface opposed to the semiconductor layer in the first electric charge accumulating layer, and
in a region of the semiconductor layer between a portion opposed to the first electric charge accumulating layer in the second direction and a portion opposed to the second electric charge accumulating layer in the second direction, a distance in the second direction between a portion that is farthest in the second direction from the first electric charge accumulating layer and a distal end of the protrusion of the semiconductor layer is 1 nm or more.
 
6. A semiconductor memory device comprising:
a semiconductor layer extending in a first direction;
a first conductive layer disposed in one side in a second direction intersecting with the first direction of the semiconductor layer, and opposed to the semiconductor layer in the second direction;
a second conductive layer disposed in another side in the second direction of the semiconductor layer, and opposed to the semiconductor layer in the second direction;
a first electric charge accumulating layer disposed between the semiconductor layer and the first conductive layer;
a second electric charge accumulating layer disposed between the semiconductor layer and the second conductive layer;
a first insulating layer disposed between the semiconductor layer and the first electric charge accumulating layer and between the semiconductor layer and the second electric charge accumulating layer; and
a second insulating layer disposed between the first conductive layer and the first electric charge accumulating layer and between the second conductive layer and the second electric charge accumulating layer, wherein
the semiconductor layer includes at least one protrusion protruding in the second direction toward the first electric charge accumulating layer on a surface opposed to the first electric charge accumulating layer,
a position in the first direction of the protrusion is inside with respect to corner portions at both ends in the first direction of a surface opposed to the semiconductor layer in the first electric charge accumulating layer, and
a distance between a corner portion of the electric charge accumulating layer and the protrusion of the semiconductor layer is 4/3 or more of a shortest distance between the protrusion of the semiconductor layer and the electric charge accumulating layer.