US 12,316,576 B2
Electronic device, method, and storage medium for wireless communication system
Zhengyi Zhou, Beijing (CN); Zhaocheng Wang, Beijing (CN); Ning Ge, Beijing (CN); and Jianfei Cao, Beijing (CN)
Assigned to SONY GROUP CORPORATION, Tokyo (JP)
Appl. No. 17/601,956
Filed by Sony Group Corporation, Tokyo (JP)
PCT Filed Apr. 14, 2020, PCT No. PCT/CN2020/084604
§ 371(c)(1), (2) Date Oct. 7, 2021,
PCT Pub. No. WO2020/211736, PCT Pub. Date Oct. 22, 2020.
Claims priority of application No. 201910317376.8 (CN), filed on Apr. 19, 2019.
Prior Publication US 2022/0190995 A1, Jun. 16, 2022
Int. Cl. H04L 5/00 (2006.01); H04J 11/00 (2006.01); H04W 72/541 (2023.01)
CPC H04L 5/0073 (2013.01) [H04J 11/0056 (2013.01); H04L 5/0085 (2013.01); H04W 72/541 (2023.01)] 16 Claims
OG exemplary drawing
 
1. An electronic device for a first base station, comprising a processing circuit, wherein the processing circuit is configured to:
obtain channel information of a channel from a second base station to the first base station;
process the channel information to divide the channel; and
provide at least portion of the processed channel information to the second base station;
wherein at least one of the first base station or the second base station cancels, based on the at least portion of the processed channel information, interference caused from downlink transmission of the second base station to uplink reception of the first base station,
wherein the processing the channel information comprises:
obtaining a first channel matrix based on the channel information; and
decomposing the first channel matrix, such that the first channel matrix is divided into a sum of a plurality of sub-channel matrices,
wherein the providing the at least portion of the processed channel information to the second base station comprises:
providing, to the second base station, at least portion of the plurality of sub-channel matrices obtained through division of the first channel matrix, wherein the providing is performed through at least one of a wireless link or a wired interface between the first base station and the second base station,
wherein the processing circuit is configured to cancel the interference by:
designing a combining matrix based on one or more sub-channel matrices in a first portion of the plurality of sub-channel matrices obtained through division of the first channel matrix; and
performing uplink reception using the combining matrix, such that the interference is at least partially projected to a left null space of the first channel matrix.