US 12,316,537 B2
Multi-dimensional routing architecture
Alejandro Rico Carro, Austin, TX (US); Saurabh Pijuskumar Sinha, Schertz, TX (US); Douglas James Joseph, Leander, TX (US); and Tiago Rogerio Muck, Austin, TX (US)
Assigned to Arm Limited, Cambridge (GB)
Filed by Arm Limited, Cambridge (GB)
Filed on Aug. 6, 2021, as Appl. No. 17/396,452.
Prior Publication US 2023/0037714 A1, Feb. 9, 2023
Int. Cl. H04L 45/58 (2022.01); G06F 15/78 (2006.01); H04L 43/0852 (2022.01); H04L 49/109 (2022.01)
CPC H04L 45/583 (2013.01) [G06F 15/7825 (2013.01); H04L 43/0852 (2013.01); H04L 49/109 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a multi-layered logic structure with multiple layers and multiple networks including a first layer having a first network and a second layer having a second network arranged vertically in a stacked configuration, wherein the first layer and the second layer include different logic structures; and
first repeater logic disposed between nodes in the first layer, wherein:
the first network links the nodes together in the first layer by way of a first data path that passes through the first layer,
the first repeater logic is used for data transfer between the nodes in the first layer,
the second network links the nodes in the first layer together by way of a second data path that bypasses the first data path in the first layer and passes through the second layer so as to reduce latency related to data transfer between the nodes, and
the second data path links the nodes with reduced latency such that data transfer between the nodes with the second data path is faster than data transfer between the nodes with the first data path, and
reducing latency related to data transfer between the nodes is associated with load balancing between the first network and the second network.