US 12,316,368 B2
Hybrid coupler based T/R switch
Kashish Pal, Reading (GB); Vikas Sharma, Reading (GB); Sebastian Diebold, Reading (GB); Leland Gilreath, San Diego, CA (US); Daoud Salameh, Reading (GB); and Farshid Aryanfar, San Diego, CA (US)
Assigned to Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed by Murata Manufacturing Co., Ltd., Kyoto (JP)
Filed on Jan. 5, 2021, as Appl. No. 17/141,857.
Application 17/141,857 is a continuation in part of application No. 17/083,859, filed on Oct. 29, 2020, abandoned.
Application 17/083,859 is a continuation in part of application No. 15/971,992, filed on May 4, 2018, granted, now 10,848,197, issued on Nov. 24, 2020.
Prior Publication US 2021/0203374 A1, Jul. 1, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H04B 1/44 (2006.01); H03F 3/19 (2006.01)
CPC H04B 1/44 (2013.01) [H03F 3/19 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01)] 30 Claims
OG exemplary drawing
 
1. A circuit arrangement comprising:
i) a balanced amplifier comprising
an output hybrid coupler comprising a first port, coupled port (CPL), a second port, direct port (DIR), a third port, isolated port (ISO), and a fourth port, input port (IN), the fourth port, IN, being configured for connection to an antenna;
ii) first and second switches of a first set of switches, respectively coupled to the first port, CPL, and the second port, DIR;
iii) a third switch of the first set of switches coupled to the third port, ISO, the third switch configured to selectively couple a terminating resistor to the third port, ISO; and
iv) a fourth switch of the first set of switches coupled to the third port, ISO, the fourth switch configured to selectively couple a bypass conduction path to the third port, ISO,
wherein during a first mode of operation of the circuit arrangement:
the first and second switches are configured to respectively couple amplified phase-shifted signals of the balanced amplifier to the first port, CPL, and the second port, DIR,
the third switch is closed so as to couple the terminating resistor to the third port, ISO, and
the fourth switch is open so as to decouple the bypass conduction path from the third port, ISO.