| CPC H03K 17/165 (2013.01) [H01L 25/071 (2013.01); H02M 7/48 (2013.01); H01L 23/49833 (2013.01); H01L 23/49861 (2013.01)] | 17 Claims |
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1. A semiconductor device comprising:
a first inverter circuit, a second inverter circuit, and a third inverter circuit, each including a first switching element and a second switching element, the first switching element and the second switching element each being rectangular in shape in a plan view and including a first electrode, second electrode and a control electrode, the first electrode of the first switching element being connected to a power supply, the second electrode of the first switching element being connected to the first electrode of the second switching element, the second electrode of the second switching element being connected to a ground;
a first conductive layer on which the first switching element of each of the first inverter circuit, the second inverter circuit, and the third inverter circuit is mounted;
a second conductive layer arranged away from the first conductive layer and on which the second switching element of the first inverter circuit is mounted;
a third conductive layer arranged away from the first conductive layer and on which the second switching element of the second inverter circuit is mounted;
a fourth conductive layer arranged away from the first conductive layer and on which the second switching element of the third inverter circuit is mounted;
an integrated circuit element arranged away from the first inverter circuit, the second inverter circuit, and the third inverter circuit, the integrated circuit element controls the second switching elements of the first inverter circuit, the second inverter circuit, and the third inverter circuit; and
first wires electrically connecting the integrated circuit element with the control electrodes of the second switching elements of the first inverter circuit, the second inverter circuit, and the third inverter circuit; wherein
the second conductive layer, the third conductive layer, and the fourth conductive layer are insulated from each other and arranged away from each other in a first direction orthogonal to a thickness direction of each of the first, second, and third switching elements,
the first switching elements of the first, second, and third inverter circuits are mounted on the first conductive layer in a state in which orientations of the respective first switching elements are the same in the plan view, and
the second switching elements of the first, second, and third inverter circuits are mounted on the second, third, and fourth conductive layers, respectively so that an orientation of at least one of the second switching elements of the first, second, and third inverter circuits differs from orientations of other second switching elements of the first, second, and third inverter circuits in the plan view.
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