US 12,316,242 B2
Submodule as a hybrid cell for a modular multilevel converter
Viktor Hofmann, Bayreuth (DE); Mark-Matthias Bakran, Erlangen (DE); and Sebastian Semmler, Nuremberg (DE)
Assigned to Innomotics GmbH, Nuremberg (DE)
Appl. No. 17/928,124
Filed by Innomotics GmbH, Nuremberg (DE)
PCT Filed Apr. 30, 2021, PCT No. PCT/EP2021/061414
§ 371(c)(1), (2) Date Nov. 28, 2022,
PCT Pub. No. WO2021/239387, PCT Pub. Date Dec. 2, 2021.
Claims priority of application No. 20177497 (EP), filed on May 29, 2020.
Prior Publication US 2023/0208315 A1, Jun. 29, 2023
Int. Cl. H02M 7/483 (2007.01)
CPC H02M 7/4835 (2021.05) [H02M 7/483 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A submodule for a modular multilevel power converter, comprising:
a first semiconductor switch, a fourth semiconductor switch and a ninth semiconductor switch forming a first series connection between a first terminal and a second terminal of the submodule, with the first semiconductor switch directly connected in a forward direction to the fourth semiconductor switch at a first network node, and with the fourth semiconductor switch directly connected in the forward direction to the ninth semiconductor switch at a fourth network node, and the ninth semiconductor switch directly connected in the forward direction to the second terminal,
a second semiconductor switch, a fifth semiconductor switch and a tenth semiconductor switch forming a second series connection between the first terminal and the second terminal and connected in parallel with the first series connection, with the second semiconductor switch directly connected in a reverse direction to the fifth semiconductor switch at a second network node, and with the fifth semiconductor switch directly connected in the forward direction to the tenth semiconductor switch at a fifth network node, and the tenth semiconductor switch directly connected in the forward direction to the second terminal,
a third semiconductor switch directly connected in the forward direction between the first terminal and a third network node,
a sixth semiconductor switch directly connected in the forward direction between the fourth network node and the third network node,
a seventh semiconductor switch directly connected in the forward direction between the fifth network node and the third network node,
an eighth semiconductor switch directly connected in the reverse direction between a sixth network node and the second terminal,
a first capacitor directly connected between the first network node and the third network node,
a second capacitor directly connected between the second network node and the third network node,
a third capacitor directly connected between the fourth network node and the sixth network node, and
a fourth capacitor directly connected between the fifth network node and the sixth network node.