US 12,316,236 B2
Method for operating a converter, converter and computer program product
Alexandre Christe, Bern (CH)
Assigned to HITACHI ENERGY LTD, Zürich (CH)
Appl. No. 18/280,115
Filed by Hitachi Energy Ltd, Zürich (CH)
PCT Filed Mar. 4, 2021, PCT No. PCT/EP2021/055487
§ 371(c)(1), (2) Date Sep. 1, 2023,
PCT Pub. No. WO2022/184261, PCT Pub. Date Sep. 9, 2022.
Prior Publication US 2024/0162828 A1, May 16, 2024
Int. Cl. H02M 5/27 (2006.01); H02M 7/797 (2006.01)
CPC H02M 5/271 (2013.01) [H02M 7/797 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method for operating a converter,
wherein the converter is implemented as a modular-multilevel converter and comprises
a control arrangement and
a first side, a second side and a number M of phase-legs which are arranged between the first side and the second side, wherein each of the number M of phase-legs comprises at least a cell with a capacitor and semiconductor switches,
wherein the converter is realized as a direct AC/AC converter, and
wherein each of the number M of phase-legs comprises a number N of cells which are realized as full bridge cells,
the method comprising:
detecting whether the converter has to be set into one mode of a group comprising:
a static synchronous compensator mode in case a voltage of at least one terminal on the first side of the converter has constantly zero Volt and/or a machine coupled to the second side of the converter has a standstill, or
a grid unbalance mode,
generating mode control signals (MCS) depending on the detected mode,
generating balance voltage reference signals (ubal,ref) depending on a first side frequency (ωg), a second side frequency (ωm), second side current reference signals (im,ref), measured phase-leg capacitor signals (uCΣ,yxn) and the mode control signals (MCS) by the control arrangement,
generating a phase-leg control signal (uref) for each of the number M of phase-legs depending on first side voltage reference signals (ug,conv,ref), second side voltage reference signals (um,conv,ref) and the balance voltage reference signals (ubal,ref) by a reference generator of the control arrangement,
generating cell control signals by a modulator of the control arrangement as a function of the phase-leg control signals (uref), and
providing the cell control signals to the semiconductor switches of the cells.