US 12,316,232 B2
Power supply device, ACF converter, and AC adapter
Takeya Okuno, Nara (JP); Manabu Yanagihara, Osaka (JP); and Hiroki Akashi, Osaka (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka (JP)
Appl. No. 17/757,973
Filed by Panasonic Intellectual Property Management Co., Ltd., Osaka (JP)
PCT Filed Dec. 17, 2020, PCT No. PCT/JP2020/047189
§ 371(c)(1), (2) Date Jun. 24, 2022,
PCT Pub. No. WO2021/145133, PCT Pub. Date Jul. 22, 2021.
Claims priority of application No. 2020-003864 (JP), filed on Jan. 14, 2020.
Prior Publication US 2023/0022728 A1, Jan. 26, 2023
Int. Cl. H02J 7/00 (2006.01); H02J 7/02 (2016.01); H02M 1/08 (2006.01); H02M 1/44 (2007.01); H02M 3/335 (2006.01)
CPC H02M 3/33571 (2021.05) [H02J 7/0042 (2013.01); H02J 7/02 (2013.01); H02M 1/08 (2013.01); H02M 1/44 (2013.01); H02M 3/33576 (2013.01); H02J 2207/20 (2020.01)] 10 Claims
OG exemplary drawing
 
1. A power supply device comprising:
a transistor block including a first transistor and a second transistor, the first transistor including a first drain terminal, a first source terminal, and a first gate terminal, the first source terminal being connected to a ground, the second transistor including a second drain terminal, a second source terminal, and a second gate terminal, the second source terminal being connected to the first drain terminal;
a gate drive circuit block including a first gate drive circuit and a second gate drive circuit, a first gate drive circuit outputting a drive signal for driving the first transistor and including a passive element, the second gate drive circuit outputting a drive signal for driving the second transistor and including a passive element; and
a driver block that outputs a pulse signal to the gate drive circuit block, wherein
the transistor block, the gate drive circuit block, and the driver block are arranged in this order in one direction,
the first gate terminal and the second gate terminal are disposed on a side same as the gate drive circuit block when viewed from a center of the transistor block,
an output terminal of the first gate drive circuit and an output terminal of the second gate drive circuit are disposed on a side same as the transistor block when viewed from a center of the gate drive circuit block,
at least a part of the first drain terminal is included in a region sandwiched between the first source terminal and the second source terminal, and
the second drain terminal is disposed at a position deviated from an extension region that extends the region sandwiched between the first source terminal and the second source terminal beyond the second source terminal when viewed from the first source terminal.