| CPC H02M 1/08 (2013.01) [G01R 15/06 (2013.01); H02M 1/38 (2013.01); H03K 17/6871 (2013.01); H03K 2217/0063 (2013.01); H03K 2217/0072 (2013.01)] | 18 Claims |

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1. A switch controller circuit for controlling switching in a topology having a first switch, a second switch, and a switching node coupled therebetween, wherein the controller circuit comprises:
a driver arrangement for controlling the first and second switches to alternately open and close, wherein a deadtime period is applied between the opening of one switch and the closing of the other switch in use;
a voltage sensor for connection to the switching node for providing feedback based on a sensed voltage as it transitions between high and low voltage states during the deadtime period; and
wherein the controller is configured to set a length of the deadtime period based on a measured first time period and a multiplier coefficient, wherein the first time period is measured from a time of opening of one of the switches to a time when the sensed voltage transitions through a threshold set between the high and low voltage states;
wherein the first time period has an algorithmic relationship with a second time period, the second time period being a time between the sensed voltage transitioning through the threshold and the time of closing of the other switch; and
wherein the multiplier coefficient is selected such that the deadtime period is the sum of the first time period and the second time period.
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