US 12,315,824 B2
Semiconductor package
Yonghwan Kwon, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Feb. 25, 2022, as Appl. No. 17/680,410.
Claims priority of application No. 10-2021-0097025 (KR), filed on Jul. 23, 2021.
Prior Publication US 2023/0023672 A1, Jan. 26, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/562 (2013.01) [H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 24/05 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a semiconductor chip;
a redistribution pattern on a bottom surface of the semiconductor chip and coupled to the semiconductor chip;
a protection layer that covers a bottom surface of the redistribution pattern;
a conductive pattern on a bottom surface of the protection layer and coupled to the redistribution pattern;
a buffer pattern in contact with a bottom surface of a first part of the conductive pattern and with the bottom surface of the protection layer, the buffer pattern being spaced apart from a second part of the conductive pattern; and
an under bump pattern on a bottom surface of the second part of the conductive pattern, the under bump pattern covering a bottom surface and a side surface of the buffer pattern,
wherein the under bump pattern is coupled to the second part of the conductive pattern.