| CPC H01L 23/5386 (2013.01) [H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/08 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/0362 (2013.01); H01L 2224/05582 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11622 (2013.01); H01L 2224/13026 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/16155 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1437 (2013.01)] | 13 Claims |

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1. An interconnection structure of a semiconductor chip, the interconnection structure comprising:
an interconnection via arranged in the semiconductor chip;
a lower pad arranged on a lower end of the interconnection via exposed through a lower surface of the semiconductor chip;
a conductive bump arranged on the lower pad; and
an upper pad including a body pad arranged on and directly contacting an upper end of the interconnection via exposed through an upper surface of the semiconductor chip and an interconnection pad arranged on and directly contacting the body pad,
wherein each of the body pad and the interconnection pad has a width wider than a width of the interconnection via and narrower than a width of the lower pad, and
wherein a width of a planar upper surface of the body pad is substantially the same as a width of a planar upper surface of the interconnection pad, and
wherein a side surface of the interconnection pad is coplanar with a side surface of the body pad.
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