US 12,315,811 B2
Graphene barrier layer for reduced contact resistance
Shin-Yi Yang, New Taipei (TW); Ming-Han Lee, Taipei (TW); and Shau-Lin Shue, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Jul. 26, 2023, as Appl. No. 18/359,383.
Application 18/359,383 is a continuation of application No. 17/403,267, filed on Aug. 16, 2021, granted, now 11,721,627.
Application 17/403,267 is a continuation of application No. 16/560,585, filed on Sep. 4, 2019, granted, now 11,094,631, issued on Aug. 17, 2021.
Claims priority of provisional application 62/750,485, filed on Oct. 25, 2018.
Prior Publication US 2023/0387018 A1, Nov. 30, 2023
Int. Cl. H01L 23/532 (2006.01); H01L 21/321 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 23/53276 (2013.01) [H01L 21/76802 (2013.01); H01L 21/76846 (2013.01); H01L 21/76864 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 21/3212 (2013.01); H01L 21/7684 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a first conductive feature at least partially disposed within a dielectric layer;
a second conductive feature electrically connected to the first conductive feature;
a graphene layer disposed directly on the first conductive feature;
a seed layer extending from the graphene layer to the second conductive feature such that the seed layer interfaces with both the graphene layer and the second conductive feature; and
a pre-fill layer disposed directly on the graphene layer between the first and second conductive features, the pre-fill layer being formed of a different material than the seed layer, the first conductive feature and the second conductive feature.