US 12,315,732 B2
Method and apparatus for etching a semiconductor substrate in a plasma etch chamber
Daisuke Shimizu, Milpitas, CA (US); Li Ling, Santa Clara, CA (US); Hikaru Watanabe, Santa Clara, CA (US); and Kenji Takeshita, Santa Clara, CA (US)
Assigned to Applied Materials, Inc.
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Jun. 10, 2022, as Appl. No. 17/837,958.
Prior Publication US 2023/0402286 A1, Dec. 14, 2023
Int. Cl. H01L 21/3065 (2006.01); H01J 37/32 (2006.01)
CPC H01L 21/3065 (2013.01) [H01J 37/32128 (2013.01); H01J 37/32146 (2013.01); H01J 37/32449 (2013.01); H01J 2237/334 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for etching a substrate in a plasma etch chamber, the method comprising:
exposing the substrate disposed on a substrate supporting surface of a substrate support to a plasma within the processing chamber; and
applying a voltage waveform to an electrode disposed in the substrate support while the substrate is exposed to the plasma during a plurality of macro etch cycles, each macro etch cycle including a first macro etch period and a second macro etch period, the macro etch period comprises a plurality of micro etch cycles, each micro etch cycle having a bias power on (BPON) period and a bias power off (BPOFF) period, a duration of the BPON period being less than a duration of the BPOFF period, and bias power predominantly not applied to the electrode during the second macro etch period.