| CPC G11C 16/10 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 11/5671 (2013.01); H10B 43/27 (2023.02)] | 20 Claims |

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1. A memory device, comprising:
memory cells;
word lines coupled to the memory cells; and
a peripheral circuit coupled to the word lines and configured to:
apply program pulses to a selected word line of the word lines in a program operation;
obtain a number of occurrences of suspensions during the program operation; and
determine an upper limit on a total number of program pulses for the program operation based on the number of occurrences of the suspensions during the program operation, wherein the upper limit represents a maximum number of program pulses allowed in the program operation, and the total number of program pulses for the program operation is smaller than or equal to the upper limit.
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