US 12,314,766 B2
Hardware accelerator service discovery
Shrikant Kelkar, San Jose, CA (US); Lakshmi Sharma, Saratoga, CA (US); Manoj Jayadevan, Cupertino, CA (US); Gargi Adhav, San Jose, CA (US); Parveen Patel, Cupertino, CA (US); and Parthasarathy Ranganathan, San Jose, CA (US)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Nov. 21, 2023, as Appl. No. 18/516,072.
Application 18/516,072 is a continuation of application No. 17/351,849, filed on Jun. 18, 2021, granted, now 11,861,408.
Prior Publication US 2024/0086247 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/46 (2006.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01)
CPC G06F 9/5044 (2013.01) [G06F 9/4881 (2013.01); G06F 9/505 (2013.01); G06F 9/5061 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method for discovering capabilities of a hardware (HW) accelerator card of a computing device, the method comprising:
opening, by one or more processors of the computing device via a communication interface, a communication channel between the one or more processors and the HW accelerator card of the computing device;
requesting, by the one or more processors via a communication interface and using the communication channel, a listing of acceleration services from the HW accelerator card;
receiving, by the one or more processors via the communication interface and using the communication channel, the listing of acceleration services from the HW accelerator card, wherein the listing of acceleration services is stored within the HW accelerator card, the acceleration services comprising functions and/or capabilities of accelerators on the HW accelerator card; and
transmitting, by the one or more processors, a workload instruction to the HW accelerator card, the workload instruction defining a workload for processing by the HW accelerator card that uses one or more of the acceleration services in the listing of acceleration services.