| CPC G06F 9/485 (2013.01) [G06F 3/061 (2013.01); G06F 3/0635 (2013.01); G06F 3/0673 (2013.01); G06F 9/4881 (2013.01); G06F 12/0292 (2013.01); G06F 15/8007 (2013.01); G06F 2212/1016 (2013.01)] | 20 Claims |

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1. A data processing system comprising:
a coarse-grained reconfigurable (CGR) processor including an array of CGR unit reconfigurable units including a plurality of pattern compute units (PCUs) and a plurality of pattern memory units (PMUs) configured to execute a dataflow graph,
a PCU further comprising a plurality of single-instruction multiple data (SIMD) units configurable to form a datapath,
wherein a PMU is coupled to the PCU via a datapath pipeline,
wherein the CGR processor is coupled to receive a configuration file via a compiler, the configuration file including a plurality of tasks to be performed by the CGR processor and their respective PCU configuration data,
wherein the CGR processor is coupled perform a task by configuring a datapath including a SIMD to generate a configured datapath, using a set of configurations bits corresponding to one or more operations corresponding to the task, wherein the configured datapath for the operation is identified as a PCU context,
wherein the CGR processor is coupled to switch among the plurality of tasks and a plurality of PCU contexts corresponding to the plurality of tasks during execution of the dataflow graph,
wherein progress of the task is tracked using a counter coupled to trigger a task complete event upon completion of a plurality of operations corresponding to the task, and
wherein the CGR processor is coupled to switch from a current task to a next task, via static switching or dynamic switching, in response to the triggering of the task complete event indicating completion of the current task.
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