US 12,314,715 B2
Tracking of store operations
Yueh Chi Wu, Taichung (TW); and Yohann Rabefarihy, Roquebrune-sur-argen (FR)
Assigned to SiFive, Inc., Santa Clara, CA (US)
Filed by SiFive, Inc., San Mateo, CA (US)
Filed on Jun. 15, 2023, as Appl. No. 18/335,528.
Claims priority of provisional application 63/435,861, filed on Dec. 29, 2022.
Prior Publication US 2024/0220244 A1, Jul. 4, 2024
Int. Cl. G06F 9/22 (2006.01); G06F 9/24 (2006.01)
CPC G06F 9/24 (2013.01) 16 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a load store unit configured to receive store micro-operations cracked from a vector store operation, and unroll each store micro-operation into multiple sub-micro-operations, the load store unit including:
an issue status vector configured to track issuance of each sub-micro-operation to a store data pipeline to write data;
an unroll status vector to track unrolling of a group of sub-micro-operations; and
a replay status vector to track replayability of sub-micro-operation associated with the group of sub-micro-operations,
wherein a first bit in the issue status vector is reset upon issuing a sub-micro-operation to the store data pipeline to write corresponding data to a corresponding entry in a store queue, and a second bit in the issue status vector is set when the sub-micro-operation is unrolled.