US 12,314,586 B2
Memory with extension mode
Shobhit Singhal, Bengaluru (IN); Ruchi Shankar, Bengaluru (IN); Sverre Brubaek, Oslo (NO); and Praveen Kumar N, Bengaluru (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Dec. 20, 2023, as Appl. No. 18/389,989.
Application 18/389,989 is a continuation of application No. 17/590,884, filed on Feb. 2, 2022, granted, now 11,899,954.
Prior Publication US 2024/0134548 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0635 (2013.01) [G06F 3/0619 (2013.01); G06F 3/0673 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system, comprising:
a first memory comprising an address input;
a second memory comprising an address input;
an extension control terminal;
an address shift circuit comprising:
an input coupled to the address input of the first memory; and
an output; and
a first multiplexer comprising:
a first input coupled to the output of the address shift circuit;
a second input coupled to the address input of the first memory;
a control input coupled to the extension control terminal; and
an output coupled to the address input of the second memory.