US 12,314,372 B2
Anti-counterfeiting applications for advanced memories
Scott C. Best, Palo Alto, CA (US)
Assigned to Cryptography Research, Inc., San Jose, CA (US)
Appl. No. 17/612,527
Filed by CRYPTOGRAPHY RESEARCH, INC., San Jose, CA (US)
PCT Filed May 21, 2020, PCT No. PCT/US2020/034086
§ 371(c)(1), (2) Date Nov. 18, 2021,
PCT Pub. No. WO2020/237093, PCT Pub. Date Nov. 26, 2020.
Claims priority of provisional application 62/852,103, filed on May 23, 2019.
Prior Publication US 2022/0237281 A1, Jul. 28, 2022
Int. Cl. G06F 21/00 (2013.01); G06F 12/14 (2006.01); G06F 21/44 (2013.01)
CPC G06F 21/44 (2013.01) [G06F 12/1458 (2013.01); G06F 2212/1052 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
providing, from a verifier module to an authenticator module, a block of data generated within the verifier module, a size of the block being correlated with one or more desired characteristics of the authenticator module, wherein the verifier module is a part of a host device, and the authenticator module is a part of an external add-on device to be connected with the host device;
providing, from the verifier module to the authenticator module, a challenge value;
receiving, at the verifier module, a response from the authenticator module, the response comprising a result derived from a calculation involving at least the challenge value and the block of data; and
verifying, at the verifier module, whether the response is indicative of the one or more desired characteristics of the authenticator module.