US 12,314,127 B2
PCIe fault auto-repair method, apparatus and device, and readable storage medium
Peipei Wang, Shandong (CN)
Assigned to SHANDONG YINGXIN COMPUTER TECHNOLOGIES CO., LTD., Shandong (CN)
Appl. No. 18/270,186
Filed by SHANDONG YINGXIN COMPUTER TECHNOLOGIES CO., LTD., Shandong (CN)
PCT Filed Apr. 28, 2022, PCT No. PCT/CN2022/089743
§ 371(c)(1), (2) Date Jun. 28, 2023,
PCT Pub. No. WO2022/228499, PCT Pub. Date Nov. 3, 2022.
Claims priority of application No. 202110474250.9 (CN), filed on Apr. 29, 2021.
Prior Publication US 2024/0103961 A1, Mar. 28, 2024
Int. Cl. G06F 11/07 (2006.01)
CPC G06F 11/0793 (2013.01) [G06F 11/0745 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A Peripheral Component Interconnect express (PCIe) fault auto-repair method, comprising:
when a PCIe link performs data processing according to a default Signal Integrity (SI) parameter, acquiring a Correctable Error (CE) error count and an Uncorrectable Error (UCE) error count in the PCIe link, wherein the default SI parameter is an SI parameter which is generated by automatic training after a system is started;
determining whether the CE error count reaches an error threshold value corresponding to the CE error count and the UCE error count reaches an error threshold value corresponding to the UCE error count;
in response to determining that the CE error count reaches the error threshold value corresponding to the CE error count, or the UCE error count reaches the error threshold value corresponding to the UCE error count, positioning an error device, and removing the error device;
reading, from pre-stored PCIe optimization parameters, a parameter to be called corresponding to the error device as a target parameter;
replacing the default SI parameter of the error device with the target parameter; and accessing the error device to the system as a normal device.